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Address mapping question

I'm confused with the address mapping used in your Stellar architecture. after reading all the documentation I'm left with a couple questions. We are going through the code as well but hopefully you can answer this directly.

I'm using the example FPGA firmware for the PC720 with the FMC110 and trying to touch registers in the IF Host Star.  My CID_PACKAGE file has the following

constant cid_registers :cid_register_type(0 to nb_cid_registers-1):=(
-- REG0 : constellationid<<16|nbrstar
-- REG1 : software build code
-- REG2 : firmware build code
-- REG3 : VersionHI<<8|VersionLO
-- REG4..6 : star 'sip_cid' {BaseAddress, EndAddress, StarId<<16|StarVersion}
-- REG19..21 : star 'sip_xx720_4l_host_if' {BaseAddress, EndAddress, StarId<<16|StarVersion}

According to the documentation for the HOST IF STAR you list several register maps but the explanation of how to get to each is a bit nebulous.  On page 7 of the SD190 xx720 Host IF Star document I see the Host IF PCI Express register map that includes register offsets 0x000 (RST) downto to 0x043(Cmd2Pci_msb).  It then go on to say later about "global address maps" in which 0x000 is test1 and 0x001 is test 1, etc.

Question 1) When i read registers 0 using the linux command "4fm_read_sysreg PC720 0 0",  I get the test1 value (xbeefdeaf) using your windows tool I get the same answer. I then read 0x2000 which is the cid_star offset (from the CID_PACKAGE file) and get x"01330009" which is the first register in the CID star (initalized from the sip_cid file).  So far so good, the problem is when i attempt to read the first register of the IF star, using the offset 0x12404 I get a timeout from both linux and windows.  Based on the address map in the sip_cid shouldn't this give me the first register in the IF star, which based on the table (page 7) in the documents should be the RST register?

Question 2) The register map in the IF star document indicates that the STAR has 67 registers but the CID_PACKAGE file indicates that the star starts at 0x12404 and ends and 0x12413 (15 addresses).  How can this be?

Question 3) The IF star document goes further to show another address map (stellar IP local address map) for the I2C but does not indicate where that would be mapped into the PCI space. How does one read say offset 3 into that space?

Question 4) Please explain the difference between the 4fm_read_anyreg, 4fm_read_creg, and 4fm_read_sysreg commands.  The documentation is a little lacking on those as well.

Ultimatly I'm trying to write C code to read specific registers inside a star.  It would appear that by adding them to the CID_PACKAGE file I should be able to then talk directly into the modules with a read and write command using the offset from the CID_PACKAGE package as the base and then indexing internally to get to addresses within the star itself.



Dear Chris

First of all I think to use sipif module in the FMC110App reference software, it has all the elementary helpers to communicate with the firmware. You can also look at the cid.cpp module, parsing the cid table as well as cid_getstaroffset() retrieving base address of a star of a given ID.

1) The host interface registers are located on the PCI BAR 0 associated to the PCI device. Typically, writing at BAR+0 is your register. Two of the registers are command register LSB and MSB which is used to send commands to the FPGA. A typical command would be a register write where you would build a packet with a write command, an address and a data. Reading a register is done by sending a read command with address and dummy data and then read data from the command FIFO implemented in the device driver.

So when you read address 0 and you get 0xbeefdeaf, the API function _4FM_Read is called with address 0, which translate into two 32 bit write on the host interface. The host interface is mapped to the PCI BAR, once again. As a side note addresses 0-7 (stellarIP addresses, not PCI addresses) are answered directly by the host interface, any addresses above 6 are forwarded to the fabric. Address 0x2000 is indeed answered by sip_cid in the fabric.

2) I am not sure what these "StellarIP registers" are for the HOST IF and why we cannot communicate with it, I will double check that. Sure thing is that the 67 registers you are looking for are contiguous on PCI BAR 0.

3) For this one I will need to look because this is not a feature we are using and this is probably why you cannot communicate with the host interface on the command bus.

4) 4fm_read_any_reg reads a register from the PCI BAR. Use with caution as this can reach any zone of the computer memory. 4fm_read_creg is deprecated on PC720, this is only use for old hardware, you can discard that one. 4fm_read_sysreg command reads a StellarIP register and there is some protocol involved (sending read command with dummy value but valid address and then read data, this translates to calling _4FM_Read() API function

I (or someone else) will answer point 2) and 3) which seem linked.

Best Regards,
Thank you for the quick response.

I had seen the getstaroffset function and it looks like it really just goes to the CID star and asks for the value that is stored in the CID_PACKAGE.  Where can I find the ublaze source file, so far all I have located is the ELF file.

On your answer for question 1 I think you confirmed my understanding that the base addresses defined in the CID_PACKAGE file is the offset from BAR for each module in the fabric. I understand that the first 8 addresses BAR+0 to BAR+7 are reserved by the command registers and do not go to fabric.  It sounds like from your description and the CID_PACKAGE snippet i included that i should be able to read into the IF STAR using BAR+0x12404? 

#2, I think your answer to this may resolve number 1.

#3, don't look too hard into this, I dont plan to use that memory I just point out that the doucment for the IF STAR includes 3 memory maps all with offsets but does not indicate how you get to the individual memories from BAR.

#4 Understood.
Dear Sir,

There are two kind of registers, the "normal registers" which are located on the PCIe BAR, this includes reset register, etc.. You can only access this registers using 4fm_readanyregister or the equivalent API function. Two of these PCIe BAR registers are used to forward commands to the fabric, thats it, a 64 bit packet is created by the software and wrote as two 32 bit register on the PCIe BAR.

The command packets typically have a read and a write operation, which allow you to read and write fabric registers, aka "StellarIP registers". These registers starts at address 0 and a few of the first addresses returns known values. StellarIP address 0x2000 has the first register of sipcid star.

The host interface has two sides, one side is the PCIe with a set of registers (PCIe BAR) and the other side has a range of StellarIP addresses. If you look at the SD190 document, you will see 0x0000000 to 0x0001000 is stated as "Reserved" which in this case indicate cannot be used and this is why you don't get anything out of there. The address is mapped but the RTL does not take advantage of that.

Let me know if everything is answered, then I will close this topic. Feel free to open another topic if required.

Best Regards,

I guess you havn't yet answered my primary question, me me rephrase it. 

What would the C command be to read and write to the IF Star to manually set the DMA length.  I understand that those registers are set by the API using the dma read and write commands inherently, lets say I wanted to use the register read and write commands to set and read that one specific register.  It should be at offset 0x12404+offset to DMA length register.

I think if you gave me that command I could work out my other answers.



I told you that twice, the host interface registers are on the PCIe BAR, the host interface is not reachable from the StellarIP side, all addresses are "reserved" so you need to communicate with the PCIe BAR, through an API and a device driver... Maybe PCIe BAR is confusing you? The PCIe BAR is a value pointing to a hardware memory mapped to the system memory by the BIOS. You cannot write that directly from user space and that's why we have an API and a device driver.

In order to reset the fabric, you need to write to PCIe BAR + 0, 4fm_write_anyreg.exe PC720 0 0 1

In order to configure other stars, you are then using 4fm_write_sysreg.exe.

Best Regards,

Dear Chris,

Was the information sufficient, may I close the topic? Feel free to open any new topic after that.

Best Regards,

I understand what BAR is, my confusion comes from your documentation of the IF star. With your comments I now understand the 2 tables in the documentation are (the Pci bar address and the 7 stellar addresses).  It's still a bit nebulous why the CID table defines a 3rd set of addresses starting at  x"00012404" but the software times out trying to get a response.

We are still having issues adding additional stars and being able to communicate with them via the stellar register reads but that will have to be another forum post.


Dear Chris,

Its not nebulous, look at the source code, you will understand nothing is implemented in the host interface star at these addresses but the designer made provision for the future with some registers configured in StellarIP, this is "reserved" as per the documentation, generally reserved means "cannot use" and therefor it is to be expected you cannot use these addresses or have expectations on how they should behave. I assume these are planned to be used to map monitoring devices on the host interface stellarIP address range, this makes perfect sense and is more flexible than adding registers to the BAR and changing the driver/API.

I hope having informed you sufficiently. And yes, feel free to open other topics for the remaining issues,

Best Regards,

This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.