However now when I create the vc707_fmc176.prj file it creates the needed files, but the top level VHDL has some compile errors and I am unable to complete the bitstreem generation. The file vc707_fmc176.vhd that has been generated is incorrect.
almost 3 years ago
I am not sure what you mean by .prj. StellarIP is creating a .xise file which you should open in Xilinx ISE