Start a new topic

ADC firmware outputs

Hey Arnaud,

I'm currently looking at the outputs of the ADC firmware signals using Chipscope pro. My question is how to interpret that, in order to be consistent with the FMC Analyzer output wave?

My first impression is that, output signal is 64 bits, consisting of 4 samples concatenated(2 bit sign extended). So I have to separate the signals, and realign them, but I'm not getting something meaningful from plotting the intercepted signals in MATLAB.

Am I missing something?

Dear Karen,

The documentation says "The 14 bits data is left justified to 16 bit and demux to 64 bit"

This means that the 14 bits of data are first encoded to a 16 bit words, bit 0 of the initial ADC sample is on bit 2 of the 16 bit sample, bit 0 and 1 of the 16 bit samples are always 0. The samples are not sign extended, maybe this is your interpretation issue.

Then the four samples are placed together as a 64 bit word. For every data wormhole clock you get 4 ADC samples.

I hope that helps,

O, I got it ,

Thank you kindly.
Dear Karen,

Thanks for the feedback!

Best Regards,
This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.