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Generation of Vivado Design fails

Is it possible to generate a Vivado Design with StellarIP as well?

I setup the path to vivado 2014.2 and generated the design but I am getting this error:
Could not find xdc fragment for 'sip_fmc126' Index=0 (D:\projects\4dsp\244_vc707_fmc126\star_lib\sip_fmc126\sip_files\sip_fmc126_VC707_0.xdc)

if I search for xdc files in 4dsp Installation Folder, I find only axi_fmc110_synth.xdc in the following Folder:
C:\Program Files (x86)\4dsp\4FM Core Development Kit\StellarIP\Training Material\AN Materials\AN002\Src\synthesis



This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.
Dear Philipp,

I will proceed with closing this topic in 24 hours unless you have something to add.


Best Regards,
Arnaud
Dear Philipp,


I am following up with you, are you able to move forward?


Best Regards,
Arnaud
Dear Philipp,


We do not support Vivado on all our firmware unfortunately. The tool indeed tells you he cannot find the XDC fragment for FMC126 on VC707. We only support Vivado on firmware having FPGA part not supported by ISE such as 1140t.


You could bring the support on your side by converting sip_fmc126_VC707_0.ucf into an xdc. These steps are covered by Xilinx litterature (http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_3/ug911-vivado-migration.pdf)


Best Regards,
Arnaud