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Timing shift of FMC DAC output

[size=3][color=#444444][font=calibri]Hello,[/font][/color]
[color=#444444][font=calibri]I am using a development board ML605 with an FMC150 connected to the LPC site. I want to generate two signals, one is output from a DAC of FMC150, the other is output from a GPIO SMA of ML605. These two signals are supposed to begin at the same time, same phase. However, only the initiation timing of the waveform from the DAC of the FMC150 shifts. This shift occurs every time I power on, re-program or does a reset through a push button written in the program, all using the same .bit file.[/font][/color]
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Can anybody help me solve this problem?
[/font][/color][color=rgb(68, 68, 68)][font=calibri]Thanks in advance[/font][/color][/size]

[size=1em]Dear Arnaud,[/size]

[size=1em]Thank you for your advice.[/size]

[size=1em]The 491.52-MHz clock on FMC150 is the main clock source in my design. [font=verdana]CDCE72010 outputs 61.44-MHz clock from U4P/N (to FPGA) and U7P/N (to DACs). [/font][font=verdana]I used the 61.44-MHz clock coming from U4P/N as reference to my SMA signal (ML605) and the signal which is designed to be output from a DAC (FMC150). [/font][font=verdana]Therefore, both have to be always in phase.[/font][/size]

[size=1em]However, they are not working as intended. Only t[font=verdana]he initiation timing of the signal from the DAC shifts [/font][font=verdana]every time I power on, re-program or does a reset through a push button written in the program, all using the same .bit file.[/font][/size]

[size=1em]I would appreciate it if you would give me any suggestion.[/size]
Dear Sir,


You need to get the design synchronous. This is outside the scope of technical support but I assume you want to use your DAC clock as reference to your SMA clock so it is always in phase?


Not sure, just an idea.


I hope that helps,
Arnaud