I have tried many different values to config CDCE72010's register, but i failed. I just want an external clock(119MHz) to be the ads62p49's sampling clock. After i config the CDCE72010, I do get a pair of 119MHz signal in out2_p and out2_n( which are to feed the ads[font=Verdana][size=78%]62p49's sampling clock). But i don't think they are LVPECL signal , because out2_p and out2_n have the same wave, but their amplitude are different, out2_n's amplitude is 4 times out2_p's. [/size][/font]
I found in the forum someone have the same problem(about how to config CDCE72010), and 4DSP's engineer's advise is to refer to the 'reference software application' . however after i download the 1GB-size 4FM.SDK file and setup on my computer, I am more confused about how to operator this application( i cannot find the CDCE72010's register setting)
Anyway, all i want to know are some points on configing the CDCE72010.( I have read the datasheet many times, some points are really not explained clearly）
1. when i use external clock, I use the CDCE72010's AUX as the feed of output divider. Should the AUX be congfiged as LVPECL or LVDS ?
2. How to config register8's 8.2 to 8.5 ( i think these bits are very importent,and their value is decided by the chip's [/size][size=78%][color=rgb(53, 161, 212)][/color][/size][size=78%][font=Verdana][/size][size=78%] the FMC150 data manul oughts to tell us how to config them) [/size][/font]
3. Should the output9 be disabled?
4.Do the PRI_REF and SEC_REF's setting not have any effect in case i use external clock.
You can still get in touch with TI for question around the CDCE chip. The CDCE72010 register setting in the software application are found in the following module:
The software application's main in main.cpp take an argument for clock mode. There are three clock modes: 0 = Internal clock with internal reference, 1 = External clock and 2= Internal Clock with external reference. The value passed as argument i converted to integer and placed in modeClock variable. modeClock is then passed to fmc15x_init() which will call fmc15x_clocktree_init().
There is also some important information in the FMC150 user manual on how to control the device.
I hope that helps!
Best Regards, Arnaud Arnaud
over 2 years ago
Thanks for your reply. [font=verdana]I found the CDCE72010's register setting in software application w[/font][font=verdana]ith your help[/font]. I finally observe the correct LVPECL signal([font=verdana]119MHZ)[/font][font=verdana] in out2_p and out2_n succesfully![/font]
The CDCE72010's register setting is as follows(using external clock as the ADS62P49's sampling clock) 683C0310 68000021 83400002 (divider num: 1) 68000003 E9800004(divider num: 2) 68000005 68000006 83400017[font=verdana](divider num: 1)[/font] [b]68000018[/b] 68050CC9 05FC270A 0280044B 0000180C
over 2 years ago
This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.