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Data generating in FPGA code

    Hi,
    We are working with FMC204 board on VC707. We can generate and send data
to FMC204 by using C code that is included in board Support Package but we want to generate data in FPGA on VC707 for our applications. We have tried to make some modifications in the FPGA code which is generated by Stellar IP and we got some errors about initializing the DACs.
    Could you help us how can we generate data in FPGA code and send the data to FMC204 card?
    And do we have to make modifications in C code while we are generating data in FPGA code?

    Thank you.

This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.
Hello,


What do you mean by "received the data that is generated by C code"? If you are referring to the sample files in the application directory its true; these are a copy of what the C code is generating. This is for debugging purpose and this is not actually read back from the hardware.


If you want to verify if your own pattern/samples is properly provided to the DAC devices, you would need to measure the DAC outputs with a oscilloscope or any other equipment that works for you.


Best Regards,
Peter

Hello,

We have no problem about C code, it works

we can not find right data path in FPGA code. We have connected data the path that you offered in FPGA code but we received
the data that is generated in C code again.
Hello,


Could you step trace the application using Visual Studio? Stepping through the "FMC204_init" function will give more insight in what is failing.


Best Regards,
Peter
Hello,
I have searched the error "Could not initialize FMC204, exiting"
The error is shown in main.cpp code, i can not specify the line number, but if
you search this error in the main.cpp code that is in fmc204APP project file
you can find where the error is.

We have connected data the path that you offered in FPGA code, our data was constant number,
but we received the data that is generated in C code.
Hello,


Could you be more specific and refer to a .cpp file and line number where the code is failing. This would help me support you.


Firmware wise in the file "dac5682z_phy_dual.vhd" you'll find the following process:



process (txclkdiv8)
begin
  if (rising_edge(txclkdiv8)) then


    if (training_en = '1') then
      fifo0_in_val <= '1';
      fifo0_in    <= x"5555AAAA5555AAAA5555AAAA5555AAAA";
    else
      fifo0_in_val <= phy0_in_dval;
      fifo0_in    <= phy0_in_data(63 downto 0) & phy0_in_data(127 downto 64);
    end if;


    if (training_en = '1') then
      fifo1_in_val <= '1';
      fifo1_in    <= x"5555AAAA5555AAAA5555AAAA5555AAAA";
    else
      fifo1_in_val <= phy1_in_dval;
      fifo1_in    <= phy1_in_data(63 downto 0) & phy1_in_data(127 downto 64);
    end if;


  end if;
end process;


You can connect your data to this multiplexer, but you need to make sure the enabling of the training pattern does not change.


Best Regards,
Peter
We have tried to find the error in the C code and i have found where the code fail, the C code can not initialize the FMC204. Probably we did not refer the data to right path in FPGA and the path that we used contains some essential bit streams for FMC204, we have send the data to all bits in registers. Could you help us where can we refer the data path in FPGA code? We have to generate data in FPGA, the data that is generated in C code does not make a profit for us.
Hello,


The reference C code is doing a pattern check on the digital interface to the DAC device. For this purpose the C code is enabling a pattern in the FPGA. If you cut the data path in the FPGA after the pattern generation the C code will fail. That is the first obvious thing that could be wrong. I suggest you step trace the C code to see which line of code is failing to give a better understanding of what could be wrong.


Best Regards,
Peter