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Getting error when I try to generate in IPSteller

[font=calibri]When I use the IPStellar to open the design file supplied I get the following warnings and errors.[/font]
[font=calibri]Any idea what is going on?[/font]
[font=calibri] [/font]
[font=calibri]Design file name & Project name in design details do not match[/font]
[font=calibri]    - File name: zc706_fmc30rf[/font]
[font=calibri]    - Expected : 287_zc706_fmc30rf[/font]
[font=calibri]    To supress this warning:[/font]
[font=calibri]    - Change the design file name[/font]
[font=calibri]    - Or change the project name in the design details (which may require changing the names of all the implement files)[/font]
[font=calibri]Input Error: Selected Target FPGA Type is not supported on this Target Board and FPGA combination according to Target database:[/font]
[font=calibri]    Please check the Design Details and the Hardware Manager to resolve this[/font]
[font=calibri]    Target information:[/font]
[font=calibri]    - Target Board    : 'ZC706'[/font]
[font=calibri]    - Target FPGA    : 'A'[/font]
[font=calibri]    - Target FPGA Type: ' XC7Z045 -2FFG900'[/font]
[font=calibri]Input warning: The design revision '0.1' is out of bounds:[/font]
[font=calibri]    Revision should be at least 1.0[/font]
[font=calibri]    No numbers higher than 255[/font]
[font=calibri]Unable to generate SDF[/font]
[font=calibri]Generate failed[/font]

Dear Sir,

This specific design has an error, follow these steps in order to fix the issue:

1) Open StellarIP
2) Open ZC706_FMC30RF
3) Answer yes to load the local library
4) Choose "Design details" from the "Design" menu
5) Under target, please select XC7Z045-2FFG900 right of "FPGA Type"
6) You can either "Fix it" or "Ignore" the warning about FPGA revision.
7) You can save your design.

After these steps you will be able to Generate your design.

Best Regards,
This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.