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Erratic DC offset on RF out from TRF3720

Hi,

we're using the FCM30RF card with the high frequency range (1.2 GHz - 3 GHz)
At the moment, I'm trying to calibrate the DC offset to reduce the DC carrier on the TX and RX path.

Unfortunately, I'm stuck at trying to permanently reduce the DC carrier on the TX chain.

After minimizing the DC carrier output of the TRF3720 by using the AFE TX_QMC_OFFSET* compensation,
I'm experiencing the case, that for each new run of FMC30RF, the DC carrier is either OK, or
again appears very strongly.

This also changes if I simply rerun the VCO calibration in the TRF3720 by setting bit reg[2].31 = 1.
- for about half the runs, the carrier is ok (with_weak_dc_carrier.png) with about -70dBm,
for the other cases, the carrier is strong (with_strong_dc_carrier.png) with about -43dBm.

It now seems there is an issue with either the VCO calibration in the TRF3720 (as it changes with
each new calibration run), or with some other (internal) calibrations, which are changing the DC offset in the TRF3720.

I compared the register contents of the TRF3720 for all registers 0-7 for both bad and good cases
- they are always the same (VCO_TRIM is always 52, VCO_SEL is always 0. IOFF and QOFF also don't change.

I noticed this also when disabling the autocalibration (by commenting it in the FMC30RF tool)
and CAL_BYPASS=1 and VCO_TRIM=52.
For each run, the carrier is either strong or weak (always the same level), so it's always one or the other.


Did you experience a similar behaviour before?

Is there something else I can try to pin the DC offset?
It's difficult to calibrate the device using IOFF/QOFF or TX_QMC_OFFSET,
if the TRF3720 later in the chain does not produce constant results.

I noticed, that for some TRF3720 registers, you are not using the TI defaults. (e.g. charge pump, etc.)
Is there a reason for this? Do you maybe have an updated set of register values for the TRF to make it
more stable?

Thank you and best regards,

Matthias


This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.
Another update:

After some help from TI, the following helped:
- Keep LO ouput and LO divider always switched off
- minimize external LO input DC feedthrough
- find a more robust DC calibration point (using IOFF/QOFF or AFE QMC offset correction).

After that, the DC carrier still varies with each calibration run, but all beyond -70dBm.
Update:
I discovered, the DC carrier appears/disappears only these cases:

- Doing VCO calibration: EN_CAL= 1
- Switching on/off divider in LO output chain (PWD_LO_DIV=1)
- Switching on/off divider in modulator chain (PWD_TX_DIV=1)

Switching on/off PWD_OUT_BUF=1 does not change the current DC offset.

Any ideas are appreciated.