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DAC2 output with rising edge undershoot, falling edge overshoot


We have been making use of the FMC110 board for a few programs at my company.  So far only making use of a single DAC output.  In a current program we are making use of both available DACs.

The DAC’s are both being configured similarly, and driven from the same ROM, but for some reason, on two separate FMC110 boards, I receive the same odd output (see attached) from the DAC2 output, where undershoot and overshoot at the rising and falling edges are present.  I am hoping someone has had some exposure to this type of issue and could point me in a good direction on debugging.

The attached displays the sync signal on channel 2, DAC1 output on CH3, and DAC2 output on CH4.  CH4 is slightly delayed by design, but from the zoomed picture it can be seen the widths are the same, as they should be.

The ROM’s feeding both DACs are loaded with identical waveforms.

It should also be noted that the undershoot on the rising edge of CH4 sometimes briefly changes to overshoot, which is the most confusing part (10MB video can not attach, can email if requested).

Thank you,

Dear Sir,
It looks like you are having timing problem in your design between the FPGA and the DAC chip. You overshoot is jumping from minus max to plus max, it is like if the MSB bit is one cycle too late or too early.
Best Regards,
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