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Generate Random waveform using FMC150 and Xilink KC705

[font=verdana]I set up the FMC150 with the Xilink KC705 board using the quick set-up guide and get a sine waveform on the oscilloscope as expected. I would now like to be able to generate a random wavefrom of my choice (for example another sine wave of a particular frequency or a OFDM waveform). I presume this would be done by inputting data of my choosing into the DAC as apposed to the data that is inputted by default which makes the sine wave. Do you know how I would go about doing this?[/font]
[font=verdana]Thanks for your help![/font]


Thank you so much for this! It was extremely helpful and I am able to get sine waves now when reading from the ADC at different frequencies, even though it took a while to find the magic numbers that worked.

I have also been trying to split up the .exe file into a init, read and write. The reason is we want to do this is so, for instance, that the read time can be reduced significantly. Ideally we'd like to call the init exe and then call the read exe repeatedly, each time reading from the ADC as quickly. I tried to do this by commenting various sections of the code but I can't get the read to work well, probably because I am ignoring some part of the code that sets up the connection.  I don't close the connection (I don't call sipif_free() at the end of main) in the init exe so ideally the connection to the Xilinx FPGA should still be open (Assuming the windows OS does not close it at the termination of the exe) and the read should work[font=verdana, arial, helvetica, sans-serif][size=1]. [/size][/font][font=verdana, arial, helvetica, sans-serif][size=2]Do you have any suggestions/ pointers on how I could implement this?[/size][/font]

[font=verdana, arial, helvetica, sans-serif][size=2]Thanks and regards,[/size][/font]

[font=verdana, arial, helvetica, sans-serif][size=2]Varun[/size][/font]

Dear Varun,
I believe opening the hardware will cause a firmware reset, this might be a problem for you, this reset code is in the ethapi. I don't think splitting the executable in two is the right approach. What I would do if I would be you is to modify the reference application so it first do the init and then wait on a key to be pressed in a loop. Each time you press a key, you get samples and this until you press CTRL-C.
Best Regards,


[size=2]I went with a similar approach to what you suggested so that the executable can now be controlled by an external application and perform repeated reads or writes. I am now trying to optimize the read operation so each read takes around 10-20 milliseconds. I can do this now by setting up the read operation with the sxdx_configurerouter(),fmc150_ctrl_enable_channel(), fmc150_ctrl_arm_dac(), fmc150_ctrl_sw_trigger() functions and then reading every time with the sipif_readdata() function ONLY. However the obvious problem here is that I can only read a certain number of samples total before it sipif_readdata() fails, and seems this number is 2*65536 (probably the size of the ADC FIFO). The reason I think this is so is because when I call [font=verdana, arial, helvetica, sans-serif] sipif_readdata() after this, without calling any of the functions mentioned above that set up the read pipe, the ADC tries to write data out of bounds in its fifo. There must be something in one of the functions that sets up the read that makes sure this doesn't happen, maybe by sending a signal or resting a pointer or something. I tried looking for this but haven't had any luck yet.[/font][/size]

[size=2][font=verdana, arial, helvetica, sans-serif]Ideally I would like to call [/font][font=Verdana] sipif_readdata() and then ONLY make the change that prevents this error as apposed to calling all the initializing functions again to make the reads as fast as possible. Do you have any idea where this may be? I hope I have described my problem well enough.[/font][/size]

[size=2][font=Verdana]Thank you very much for your help so far and look forward to hearing from you.[/font][/size]



you should not setup the system in a way that you can overflow the FIFO. Either read fast enough on the output of the FIFO (not possible with the Ethernet interface) or reduce the burst size to that of the maximum FIFO size.

If this reference design does not suit your application needs you have access to all the sources and you are free to modify the design.

4DSP can deliver a PCIexpress interface  (400 + MB/s data transfer rate) as well as a FIFO design that uses the external DDR3 memory for storing ADC data. Please contact your local sales person if you are interested in these options.

Best regards,
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