4DSP Products Technical support

Dear Sir,

We are developing a simple system on ML605 with an FMC204.

We got the following error message in testing the FMC204 using your sample codes.

It would be great if you give us possible causes for this error.

Based on tracing results, this error was caused in line# 224 in FMC204_dac.cpp.

At this point, dword = 0x0018fbe8, bar_dac0 = 9730, rc = 0, and dac0_pattern = 0.

By the way, it looks like a DAC itself is working correctly as we can see a sine wave on the oscilloscope.

TIA,

>>>>>>>>>>>>>>>>>>>>>>>>

Start of program
--------------------------------------
Constellation ID : 95
Number of Stars  : 7
Software Build  : 0x522C7778
Firmware Build  : 0x00000000
Firmware Version : 0.1
--------------------------------------

Found FMC204 hardware on ML605


-------- Onboard Monitoring ---------
IIC Mon Dev ID  : OK (0x02)
IIC Man Dev ID  : OK (0x41)
IIC Mon Sil Rev : OK (0x05)
TEMP (  ADT  ) : OK (45.25C)
VDD  ( 3.3V  ) : OK ( 3.25V)
AIN1 ( 3.3Vclk) : OK ( 3.23V)
AIN2 ( 1.8Vdig) : OK ( 1.76V)
AIN3 ( Vadj)    : OK ( 2.48V)
AIN4 ( 2.5Vclk) : OK ( 2.47V)
AIN5 ( 3.3Vdig) : OK ( 3.31V)
AIN6 ( 3.3Vadc) : OK ( 3.28V)
AIN7 ( 3.3Vcp ) : OK ( 0.01V)
AIN8 (  12V  ) : OK (11.56V)
-------------------------------------
Could not initialize FMC204.DAC
Could not initialize FMC204, exiting

>>>>>>>>>>>>>>>>>>>>>>>>>

This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.

Thanks a lot!!!

Hello again Chris,


Yes its a bit cryptic.


The data interface is 1000Msps  because it transfers data for two channels at 500MHz.


The 125MHz clock is because in the FPGA is a x8 serdes therefore a 125MHz PHY clock is required.


I hope that helps,
Arnaud

Erik,

Then, what Fs means in the following console message printed in running the sample code?

>>>>>>>>>>>>>
DAC PHY Clock : 125MHz (Fs = 1000MHz)
DAC Ref Clock : 500MHz (Fs = 1000MHz)
>>>>>>>>>>>>>

Thank you!

Chris

Hi Erik,

I got it.

Thanks!

Dear Chris,


The data bus is DDR (double data rate) and there comes your extra x2, does it make sense?


Best Regards,
Arnaud

Hi Erik,

It's very strange, but our FMC204 card is suddenly starting to work!

Looks like a connection problem... Maybe... Not sure though.

Whatever, we've successfully test the card using your sample codes.

However, the following measured frequency values shown on the console are somewhat strange to me.

>>>>>>>>>>>>>>>
Stellar IP clock: 125MHz
DAC PHY clock : 125MHz
DAC Ref clock : 500MHz
>>>>>>>>>>>>>>>

In your FMC204_DAC_init sample code, FIR filters are enbled (addr: 0x01 and val: 0x11) but 4x interpolation is not enabled (addr: 0x02, val:0xC0).

As far as I understand the datasheet of TI DAC5682Z correctly, DAC shall perform 2x interpolation with this configuation.

Therefore, I think DAC Ref clock shall be two times faster than DAC PHY clock wth PLL disabled as in the sample code, but the measured value is actually four times faster.

Please help us to correct things we are doing wrong.

Thanks!

Chris

Hi Erik

We have two ML-605 boards and have tried to test your FMC204 sample code on the both of them after cleaning connectors and pins of FMC204 and ML-605 as per your advice.

Unfortunetely, however, all tests failed.

The FMC204 card is not working on any of them.

We got the same error messaage mentioned above.

We have an FMC104 ADC card and tried to test it on the both of two ML605 boards.

The FMC104 is working perfectly.

The serial number of the FMC204 card above is "".

Please help us to solve this problem.

Thank you!

Hi Chris


what you could try is to clean the FMC connector on your carrier and on the FMC using some alcohol and a brush.


do you have another ML605 to try the card on?


can you let me know the serial number of the FMC204 that is giving you issues?


thanks,
erik