4DSP Products Technical support

Hello,

I am trying to implement clock mode option 1 (external clock) and clock mode option 2 (external reference). Neither option works when running the reference design for VC707.
For the external reference option, I just plug in a 30.72MHz sine wave to the REF IN port on the front panel but the PLL never locks.
For the external clock I have tried various ranges between 500MHz and 5.6GHz and the only feedback I get from the reference application is odd readback frequencies from the firmware. It usually reads back around 50MHz for either DAC for any external clock frequency I try.

Have these modes been tested for functionality?
Please advise.

Thanks
Stan

Let me add some more information that might help you guide me in the right direction.

Regarding the external reference mode:

I set REFMON from the clocktree register to output the REF1/REF2 frequency status.  I am probing the STATUS pins in the CPLD and when the board is configured with the internal reference, REFMON detects REF1 correctly. When I configure the board to use the external reference, REFMON does not detect REF2.
I have tried various voltage levels and frequencies on the external reference input and it is not being detected. Is there anywhere I can probe on the board to check if the external reference is actually getting to the REF2 input on the clocktree?

Stan,


Yes, we test the external clock and referce in. REF_IN can be probed R21 near the REF_IN connector  or R44 between CLK_LD and DAC0 SYNC test points on the bottom of the card. These directly connect to REF2.


Thanks,
Kyu

Hi Kyu,

I ended up probing directly at pin 47 on AD9517 which is the REF2 input and I am able to see the waveform on the scope.
I played around with different level setting and waveforms for the external reference signal.
The device is able to detect (but NOT lock) a square/sine wave 0 to 3V at 30.72MHz. Anything below 3V and it does not detect it.  Now there is still an issue with the PLL lock. It doesn't lock when the external reference is selected (even though I have set it to the same frequency as the internal VCXO, 30.72MHz).

We own an FMC110 board which uses the same clock tree device (AD9517) and I believe the reference input is differential. The reference input on that board works perfectly.
Not sure what is happening here, could there be an issue because it is a single ended input on this board?

Stan,


Single ended input should not cause this issue. It may be your setting. If you check the reference application, there's a setting for the internal 32.72 clock. Could you try to follow this example for the REF2?


Kyu

I found out the problem. The function that  I was using to write to the clock tree device was applying the register write after every function call.  When setting up the N and R dividers and initiating a calibration, all register writes have to be completed before applying the changes.
The external reference mode works now.
Thank you.

Stan