4DSP Products Technical support

Dear 4DSP,


I've got the write operation table as we've discussed at http://www.4dsp.nl/forum/index.php/topic,2897.0.html


[font=Verdana][size=78%]I studied the vc707_fmc30rf.xise and the brd_packet_engine.vhd says it manages all of the ethernet communication with the reference design software. But I found it rather confused to understand how the packets are dealt with in reference firmware. Is there any possible reference about the signal path or some other detailed [/size][/font][font=verdana, arial, helvetica, sans-serif]explanation? There is few annotate in the vhd file and it's not easy for a beginner like me to understand the process.[/font]

[font=verdana, arial, helvetica, sans-serif]The next goal is to write the write operation table to the chip so I have to figure out how the ethernet communication works in reference firmware.[/font]

[font=verdana, arial, helvetica, sans-serif]Thanks![/font]

[font=verdana, arial, helvetica, sans-serif]Best Regards,[/font]
[font=verdana, arial, helvetica, sans-serif]Ricky[/font]

Dear Ricky,


Two sources of information would be the SD (Star Description) for the mac engine which has description of the interfaces and simulation. The simulation reads a .sip file and translate that to command bus transactions.


Best Regards,
Arnaud

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