Our reference design has a PCI root complex on the the FPGA side (microblaze system) and the DSP is used as slave. Our reference design uses PCIe BOOT in order to load codes in the DSP.
We do not have TMS320C6455 slave examples as we only rely on the chip's ROM bootloader PCI host boot and in this mode the TMS320C6455 is configured properly.
I am attaching the BSP user manual for your convenience there you will have more details about the design architecture, it is pretty handy all together; The DSP is somehow running in a jailed environment from a host software.
Best Regards, Arnaud
about 6 years ago
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