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Synchronizing ADC and DAC

Hello again everyone,

My application involves needing to synchronize the DAC output and ADC input (so that, say, every tenth data point is captured by the ADC, as 0, 10, 20, ...), or at least gain an idea of the time lag so I can prefix zeros on my output buffer. Is there a good way to do this? I've noticed that writing a 5 to the FMC176_CTRL_COMMAND register doesn't trigger the ADC, and I'd love to have an easier solution than having to dig into the HDL, find whatever process minds this register, and change it to suit my needs (likely breaking some other functionality).

Thanks in advance,

Hello Matt,
So I think the software first arm by writing a 1 in FMC176_CTRL_COMMAND and then write a 4 to FMC176_CTRL_COMMAND in order to send a software trigger. These bits are self clearing in the firmware.
This assume the next register (pardon me I have no doc) after FMC176_CTRL_COMMAND holds the enable bits for ADC/DAC channels.
More details can be found in fmc176_ctrl.cpp where you have functions such as FMC176_ctrl_arm(), FMC176_ctrl_sw_trigger().
Best Regards,
Hi Arnaud,

Thank you for your reply. You are correct in your statements. Unfortunately, while the ADC inputs are triggered, the DAC outputs are not; so although the DAC starts running, the ADC still waits for a trigger. Since this trigger is sent over Ethernet, it does not have a deterministic response (e.g. there's no set time for the ADC to start running after the DAC starts running). It appears I will need to edit the star's source code to meet my specifications; when I'm done figuring it out I'll post it back here so that others who need the same functionality would be able to repeat my process.

From UM026, the ADC firmware does not support deterministic latency. It appears that this problem is unsolvable using Stellar IP.

StellarIP uses VHDL stars, all the source code is disclosed. As soon StellarIP generated the design, the design is a pure ISE project with VHDL source code. If something is unsolvable, then it is about firmware engineering skills of the user.

Best Regards,
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