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FMC150 and Hitech Global LPC fmc connector




I recently purchased two FMC150's and a Hitech Global [size=small][font=Times] HTG-V6-PCIE-[/font][/size][size=small][font=Times]XC6V[/font][/size][size=small][font=Times]S[/font][/size][size=small][font=Times]X[/font][/size][size=small][font=Times]315T[/font][/size][size=small][font=Times]-[/font][/size][size=small][font=Times]2-[/font][/size][size=small][font=Times]FFG1759.[/font][/size]
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[size=small][font=Times]This version of the Hitech board has one FMC HPC connector and a second FMC LPC connector. Both Hitech and 4DSP claim to be Vita 57.1  compliant, but the specs seem to indicate that pins 3-20 in the C,D,H, and G lanes are unwired on the LPC connector on the Hitech board, while the same pins connect most of the ADC A/B channel data in the 4DSP side.  [/font][/size][font=Times][size=small]I am not familiar with the specifics of the standard, but this is a big problem for me.[/size][/font]
[/size][size=small][/size][size=small][font=Times]I am asking the same question to the Hitech folks, does anyone else have any experience with this issue? [/font][/size][size=small][/size][size=small]

Hello,

there's no easy work around.
If you use your board in a stand alone configuration then an ML605 might be a better choice as it offers two FMC sites (HPC and LPC) that both have enough connections for the FMC150.
The drawback is that it does not have any Virtex-6 SXT device.

Thanks
Pierrick
Thanks for your reply.


I have come to the same conclusion, the Hitech board does not seem to meet the spec. The active connections that are available to the FPGA start at LA_18 rather than LA_00.


This applies to the FMC "B" connector with Virtex 6 chips smaller than the LX550 and SX475.


This means that I am losing the two ADC channels on my second device. Any suggestions for a workaround are welcome. I can't think of anything other than a second FPGA board.


Don

Hello,

based on your description it would seem to indicate that the Hitech card is not compliant with VITA 57.1 with LPC.
However if signals on rows C, D, H and G are not connected, what is connected?

Please see attached picture for LPC connections as defined by VITA 57.1.

Thank you,
Pierrick


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