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sip_mac_engine performance/alternatives

[font=verdana, arial, helvetica, sans-serif][size=2]We are weighting communication options for architecture of our DPS systems. One of our several use models involve acquiring ADC data at full rate, processing and down-converting on the FPGA and then streaming data to Windows host. Is sip_mac_engine suitable for this? Posible use scenario would be to buffer procceed data and request it block by block using ethapi protocol.  What kind of sustained throughput one can expect to get from sip_mac_engine running on kc705 or VC707 development board? Do you have any estimates for communication error rate? I also notice that your Zynq-based designs moved up from Ethernet to TCP/IP layer, which sounds more flexible and reliable. How does the performance compare between the two?[/size][/font]

Could you please send us ethapi source code "AS-IS"? We are getting some inconsistent results with some of the calls to ethapi.dll functions and would like to work with the source.
Dear Sir,

The ETHAPI is not reliable; It was designed to offload snapshots (few kB data) and not any kind of sustained streaming. I believe the maximum rate you would get reliably is 1-5MB/s but as explained I would not rely on that.

To give you some details, the API is only implementing the packets as per the sip_mac_engine star documentation manual. The API is creating packets as per the SD document and sends that to the NDIS layer through a driver. If a packet is missed it will never recover.

Indeed we have implemented TCP/IP in SIPIF layer on the Zynq reference design. This is because the Zynq runs fast and supports LWIP in the flow. This gives a very simple TCP/IP feature in the firmware.

If you need Ethernet, maybe it would make sense to contact and ask them if they can provide you a TCP/IP reference design as there are discussions about that.

4DSP prefers not to disclose ETHAPI source code unless it is really required.

Best Regards,
Thanks for clarification Arnaud!

- do you have a rough estimate for the throughput 4DSP TCP interface on zc706 board? (for example sip_zc706_host_if)

- is FMC116 compatible with zc706 board, and, if so, are there any plans to issue zc706_FMC116 reference design?

- in ETHAPI - what are the buffer size limits for ReadBlock and WriteBlock routines?


With regards to the TCP throughput, we don't have anything official but this is around 5MB/s.
The FMC116 is partially compatible, it has not been tested but it should support up to 12 channels, please contact for more information about reference designs.
I've forwarded your question about the ETHAPI to another engineer.

Best regards,
Ingmar van Klink
As far as ETHAPI buffers is concerned, there is a large queue in the driver but once again, the maximum we offload/upload in one time is 64kB.
This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.