4DSP Products Technical support

[size=medium][font=courier]Hi all,[/font][/size]
[font=courier]I am using VC707 and FMC176. I have following questions:[/font]
[font=courier]1. In the GTX spec, it is said that the device clock is 1/40 of the serial line rate. So, does it mean that we have to configure the dividers of FMC176's PLL and the ADC9250 clock divider so that the clock feeding into the ADCs are 1/40 of the chosen serial line rate? [/font]

[size=medium][font=courier]2. I simulated my JESD204b RX design which includes an GTX RX and the simulation results is correct. But when I implemented the design and checked the rxbyteisaligned of the GTX block. This signals was not asserted when I set the sampling rates of the ADC and the gtx ref clock  the same as those of simulation. However, when I  decreases the gtx ref frequency by 2 or by 3, then rxbyteisaligned  is asserted for a while but the JESD204b sync is still low.[/font]
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[size=medium][font=courier]The detailts of my design are as follows:[/font][/size]
[font=courier]a. GTX: Serial line rate: 1.7664 GHz; GTX ref clock = 353.28 MHz. With these information, my understanding is that the sampling rate of ADCs is  1.7664GHz/40 = 44.16 MHz. [/font]
[font=courier]b. On FMC 176 card: I set the output of the VCO divider to be 1413.12 MHz and the ouput of the divider 0 is 353.28 MHz which is then divided by 8 inside AD9250 to have a sampling rate of 44.16 MHz.[/font]

[size=medium][font=courier]I also checked all configuration parameters for JESD and FMC176 using UART interface to make sure that nothing wrong with the configuration.[/font][/size]
[font=courier]Could you please advise me where I should begin to debug when the GTX does not work?[/font]
[size=medium][font=courier]Thanks,[/font][/size]

This topic is being closed because the issue is considered as resolved by 4DSP. Feel free to create a new topic for any further inquiries.

Dear Sir,


Was the information sufficient, can I go ahead and close this topic?


Best Regards,
Arnaud

Dear,


I have answered your other post about this subject. Please do not duplicate questions. I will ask my colleague to close this topic accordingly.


Best regards,
Ingmar van Klink