4DSP Products Technical support

I just wanted to let the community know that there are some errors in FMC interface pin-out table located in Appendix A of the r1.1 (February 2013) FMC176 User Manual .  I'll let the 4DSP folks clarify what they are.

Best,
Stefan

Dear Stefan,
Thank you for you valuable feedback. Are you referring to the revision 1.1 document part of our current material? I can see that there was an update on FMC176/FMC230 user manuals:
FMC_TO_CPLD pins pairs were swapped 1 and 2 as well as 3 and 4.
CLK_DIR is unconnected.
Could you please indicate if this is the errors you are referring to?  I am attaching revision 1.1 manual to this post.
Best Regards,
Arnaud

Is there an error in the pinout on net CLK0_M2C_N and CLK0_M2C_P?
Are signal CLK_TO_FPGAN/P on pins H4 and H5 actually on D4 and D5 of the FMC connector?

Alexandru,


CLK_TO_FPGA pins are connected correctly to H4 and H5 of the FMC connector. D4 and D5 are connected to GBTCLK0 (which is ref_clk in the firmware). We will update the GBTCLK pins.


Thanks,
Kyu